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| om .c DATA SHEET U t4 MB501LV/504LV ee LOW VOLTAGE/LOW POWER TWO MODULUS PRESCALERS Sh ta a LOWD VOLTAGE/LOW POWER TWO MODULUS PRESCALERS . w w w Sept. 1995 Edition 4.0a The Fujitsu MB501LV/504LV are low power and low voltage versions of MB501/504, two modulus prescalers used with a frequency synthesizer to make a Phase Locked Loop (PLL). They will divide the input frequency by the modulus of 64/65 or 128/129 for the MB501LV, and 32/33 or 64/65 for the MB504LV. The output level is 1.1V peak to peak on ECL level. S Wide Low Voltage Operation 3.0V typ., +2.7 to 4.5V S High Frequency Operation, Low Power Operation (VIN = -12dBm min.) 1.1 GHz at 36mW typ. (MB501LV) 520MHz at 18mW typ. (MB504LV) S Pulse Swallow Function S Wide Operation Temperature S Stable Output Amplitude TA = -40C to +85C VOUT = 1.1Vp-p typ. S Built-in a termination resistor Stable output amplitude is obtained up to output load capacitance of 8pF. S Complete PLL synthesizer circuit with the Fujitsu MB87001A, PLL synthesizer IC S Plastic 8-pin Standard Dual-In-Line Package or space saving Flat Package ABSOLUTE MAXIMUM RATINGS (see NOTE) Rating Supply Voltage Input Voltage Output Current Storage Temperature w w .D w Symbol VCC VIN IO TSTG t a S a e h t e U 4 PLASTIC PACKAGE DIP-08P-M01 .c m o PLASTIC PACKAGE FPT-08P-M01 IN VCC 1 2 TOP VIEW 3 4 8 7 6 5 IN NC MC GND Value -0.5 to +7.0 -0.5 to + VCC 10 - 55 to +125 Unit SW V OUT V mA _C Note: Permanent device damage may occur if the above Absolute Maximum Ratings are exceeded. Functional operation should be restricted to the conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. This device contains circuitry to protect the inputs against damage due to high static voltages or electric fields. However, it is advised that normal precautions be taken to avoid application of any voltage higher than maximum rated voltages to this high impedance circuit. Copyright E 1992 by FUJITSU LIMITED w w w .D a aS t ee h 4U t om .c MB501LV MB504LV a) MB501LV SW DQ Input Buffer IN IN SW DQ CQ DQ CQ DQ CQ DQ CQ DQ SW CQ Output Buffer OUT Note: C DQ C DQ CM H H L L MC H L H L Divide Ratio 1/64 1/65 1/128 1/129 SW: H = VCC, L = OPEN MC: H = VIHM to VCC, L = GND to 0.8V VHIM = 1/2 VCC +0.3V MC b) MB504LV SW DQ Input Buffer IN IN SW DQ CQ DQ CQ DQ CQ DQ SW CQ Output Buffer OUT C DQ C DQ CM H H L L Note: MC H L H L Divide Ratio 1/32 1/33 1/64 1/65 SW: H = VCC, L = OPEN MC: H = VIHM to VCC, L = GND to 0.8V VHIM = 1/2 VCC +0.3V MC Figure 1. Block Diagrams 2 MB501LV MS504LV PIN DESCRIPTION Pin Number 1 2 3 4 5 6 7 8 Symbol IN VCC SW OUT GND MC NC IN Input DC Supply Voltage Divide Ratio Control Input (See Divide Ratio Table) Output Ground Modulus Control Input (See Divide Ratio Table) Non Connection Complementary Input Function RECOMMENDED OPERATING CONDITIONS Value Parameter Symbol Min. Supply Voltage Output Current Ambient Temperature Load Capacitance VCC IO TA CL -40 2.7 Typ. 3.0 1.2 +85 8 Max. 4.5 V mA C pF Unit 3 MB501LV MB504LV ELECTRICAL CHARACTERISTICS (Recommended Operating Conditions unless otherwise noted) Value Parameter Symbol Conditions Min. MB501LV Power Supply Current MB504LV Output Amplitude MB501LV Input Frequency MB504LV Input Signal Amplitude High Level Input Voltage for MC Input Low Level Input Voltage for MC Input High Level Input Voltage for SW Input Low Level Input Voltage for SW Input High Level Input Current for MC Input Low Level Input Current for MC Input MB501LV Modulus Set-up Time MC to OUT MB504LV Note: * Design Guarantee tSET 18 28 ns PIN VIHM VILM VIHS* VILS IIHM IILM VIH = 2.0V VIL = 0.8V -0.2 16 26 VCC -0.1 VCC OPEN 0.4 VIHM = 1/2 VCC +0.3 fIN With input coupling capacitor 1000pF 10 -12 VIHM 0.8 VCC +0.1 520 5.5 MHz dBm V V V V mA mA ns VO 0.8 10 ICC VCC = 3 0V 3.0V 6 1.1 1100 mA VP-P MHz Typ. 12 Max. mA Unit 4 MB501LV MS504LV MB501LV TIMING CHART (2 MODULUS) Example: Divide Ratio of 64/65 64 65 IN 32 OUT 32 32 32 32 32 32 33 32 32 33 32 33 32 32 MC tSET tSET Notes: When divide ratio of 65 is selected, positive pulse is added by one to 33. The typical set up time is 16ns from MC signal input to the timing of change of prescaler divide ratio. MB504LV TIMING CHART (2 MODULUS) Example: Divide Ratio of 32/33 32 33 IN 16 OUT 16 16 16 16 16 16 17 16 16 17 16 17 16 16 MC tSET tSET Notes: When divide of 33 is selected, positive pulse is added by one to 17. The typical set up time is 18ns from MC signal input to the timing of change of prescaler divide ratio. 5 MB501LV MB504LV +2.7V to +4.5V C3 Sampling scope input point for input waveform C1 P.G. IN VCC SW OUT Sampling scope prober point for output waveform IN 50 C2 CL MC GND MC Input C1: 1000pF C2: 1000pF C3: 0.1F CL: 8pF (including scope and jig capacitance) Figure 2. Test Circuit TYPICAL CHARACTERISTICS CURVES MINIMUM INPUT SIGNAL AMPLITUDE (mVp-p) 1000 MB501LV 800 600 400 200 0 10 20 VCC = 3.0V TA = 25C MINIMUM INPUT SIGNAL AMPLITUDE (mVp-p) 1000 800 600 400 200 0 10 MB504LV VCC = 3.0V TA = 25C 50 100 200 500 INPUT FREQUENCY (MHz) 1000 2000 20 50 100 200 500 1000 INPUT FREQUENCY (MHz) Figure 3. Input Signal Amplitude vs. Input Frequency Figure 4. Input Signal Amplitude vs. Input Frequency 6 MB501LV MS504LV C1 VCC C2 XI 12K VSX (Max. 8V) VCC VCC 10K 16 15 14 13 12 11 10 9 MB87001A 0.047F 12K VCO OUTPUT 12 3 4 56 78 100K 10K 33K Clock Data LE 1000pF 1000pF 47K 47K 47K 87 VCC 6 5 MB501LV/504LV 12 3 4 XI VCC VSX C1, C2 :12.8MHz x'tal : +2.75V to +4.5V : 8V Max. : depends on crystal oscillator 1000pF 1000pF Lock Det. 10K Figure 5. Typical Application Example 7 MB501LV MB504LV PACKAGE DIMENSIONS 8-LEAD PLASTIC DUAL IN-LINE PACKAGE (CASE No.: DIP-08P-M01) ) .016 .370 -.012 ) 0.40 9.40 -0.30 15C MAX. INDEX .244 .010 (6.20 0.25) .300 (7.62) TYP. ) .012 .039 -.000 ) 0.30 0.99 -0.00 ) .014 .035 -.012 ) 0.35 0.89 -0.30 ) .012 .060 -.000 ) 0.30 1.52 -0.00 .010 .002 (0.25 0.05) .172 (4.36) MAX. .020 (0.51) MIN. .100 (2.54) TYP. .018 .003 (0.46 0.08) .118 (3.00) MIN. Dimensions in inches (millimeters). E1988 FUJITSU LIMITED D08006S-2C 8 MB501LV MS504LV PACKAGE DIMENSIONS (Continued) 8-LEAD PLASTIC FLAT PACKAGE (CASE No.: FPT-08P-M01) ) .010 .250 - .008 ) 0.25 6.35 - 0.20 .089(2.25) MAX. (SEATED HEIGHT) .002(0.05) MIN. (STAND OFF) .307+.016 (7.80+0.40) INDEX .209+.012 (5.30+0.30) ) .016 .268 - .008 ) 0.40 6.80 - 0.20 .020+.008 (0.50+0.20) .050(1.27) TYP. .150(3.81) REF. "A" Details of "A" part .008(0.20) .018+.004 (0.45+0.10) .005(0.13) M ) .002 .006 - .001 ) 0.05 0.15 - 0.02 .004(0.10) .020(0.50) .007(0.18) MAX. .027(0.68) MAX. Dimensions in inches (millimeters). E1988 FUJITSU LIMITED F08002S-3C 9 |
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